[HW] NoC (Network-on-Chip) Design Engineer

자격 요건 · 6개

• Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field.
• Proven experience in RTL design (Verilog/SystemVerilog) for complex SoC environments.
• In-depth understanding of on-chip communication protocols (e.g., AMBA AXI, ACE, CHI).
• Experience with NoC architecture concepts such as routing algorithms, flow control, and arbitration logic.
• Strong analytical skills for performance bottleneck identification and resolution.
• Excellent communication skills and the ability to work in a fast-paced, collaborative environment.

우대 사항 · 5개

• Experience with commercial NoC IP (e.g., Arteris, NetSpeed/Sifive) or in-house custom NoC development.
• Knowledge of AI/Machine Learning hardware acceleration and data flow requirements.
• Proficiency in scripting languages such as Python, Perl, or Tcl for design automation.
• Experience in power-aware design (UPF/CPF) and clock domain crossing (CDC) analysis.
• Familiarity with performance simulation tools (e.g., SystemC, gem5).