Pre-Silicon Verification (SW/HW Co-design): Develop firmware and low-level test suites for SoC functional verification using FPGA prototypes and Emulation (Palladium, Zebu, etc.).
Post-Silicon Bring-up: Lead the initial power-on and functional "bring-up" of new ASIC silicon, ensuring the hardware blocks (CPU, NPU, Peripherals) communicate correctly.
Hardware-Level Diagnostic SW: Design and implement diagnostic software to stress-test hardware components and identify design flaws or manufacturing defects.
Bare-metal & RTOS Development: Develop core boot-code, hardware abstraction layers (HAL), and low-level drivers in non-OS or RTOS environments.
Architecture Collaboration: Work with RTL designers to define register maps, interrupt handling, and memory-mapped I/O (MMIO) structures.
Performance Profiling: Measure and optimize hardware-level bottlenecks (latency, throughput) before the hand-off to the general SW team.
