[HW] SoC Design (MIPI, ISP & DSC Subsystem)

자격 요건 · 5개

• Proficiency in RTL implementation (Verilog/SystemVerilog) for subsystem integration, and strong experience in IP-level and subsystem-level verification.
• Understanding of ISP pipeline stages (Demosaic, Noise Reduction, HDR, Color Correction, etc.) and experience in IP integration.
• Experience in interfacing various CMOS Image Sensors (CIS) with SoC via MIPI.
• Hands-on experience integrating video stream compression technologies (specifically VESA DSC) using 3rd-party IPs.
• Ability to debug complex timing issues, interface bottlenecks, and protocol violations within high-speed transmission subsystems.

우대 사항 · 4개

• Experience in applying NPU technologies to video processing tasks.
• Previous experience in the system semiconductor or AI hardware industry.
• Innovation & IP: Experience in filing patents or developing core IP portfolios.
• Excellent communication skills to work with global IP vendors and partners.