[HW] Entry-level PCIE Link (Controller) Design Engineering

자격 요건 · 5개

• Design and implementation of PCIe Controller and Link Layer logic for NPU SoCs 역량을 갖춘 분
• Integration and verification of PCIe IP in RTL design 역량을 갖춘 분
• Development of PCIe protocol logic including configuration, flow control, and error handling 역량을 갖춘 분
• Performance optimization and validation of PCIe interfaces 역량을 갖춘 분
• Collaboration with verification, firmware, and system teams for end-to-end PCIe functionality 역량을 갖춘 분